Fault Injection Based Validation of Fault-Tolerant Multiprocessors

One of the most crucial tasks in the design of fault-tolerant computers is the validation of the builtin error detection and handling mechanisms. Predesign validation techniques, like performability modelling and analysis, often require such information as exact failure rates, which is usually unavailable for the user. Moreover, the majority of computer failures originate from transient faults, occurring one order of magnitude more often than permanent ones. The rate and the site of transient faults depends heavily on the lay-out, i.e. experimental validation on a prototype is always required for a realistic prediction of the fault tolerance measures. Software methods dominate in this field, because of the difficulties in hardware-based fault injection methods.